KiCad Engineer for Hardware & PCB Design

About the project

Experienced KiCad Hardware Engineer – Schematic Capture, DFM-Optimized PCB Layout & Production Package (Turnkey JLCPCB Assembly) Job Description: Honeycomb LLP is seeking an experienced embedded hardware and PCB design engineer to take a product design from initial block diagram/specifications through complete schematic capture, PCB layout, and turnkey assembly package delivery. The board will host an embedded microcontroller ecosystem (e.g., ESP32 / RP2040 / STM32) interfacing with sensors and power management circuits. The final design must be fully optimized for cost-effective manufacturing and assembly via JLCPCB SMT services. Scope of Work & Responsibilities: 1) Schematic Capture: Design modular, production-ready schematics in KiCad (latest stable version) adhering strictly to standard, commercially permissive reference architectures. 2) BOM & Component Sourcing: Select active and passive components strictly mapped to available, in-stock parts from the LCSC catalog. Prioritize JLCPCB Basic Parts for standard passives to minimize feeder setup fees, and ensure all parts meet target availability thresholds. 3) PCB Layout & Routing: 3.1) Multi-layer routing compliant with JLCPCB 2-layer / 4-layer Design Rule Checks (DRC). 3.2) Proper power plane decoupling, thermal relief, and ground plane continuity. 3.3) Single-side SMT placement where possible to minimize assembly costs. 4) Fabrication & Assembly File Generation: Generate all production files and perform pin-1 / polarity orientation alignment using JLCPCB assembly placement visualizer conventions. Required Deliverables: Payment will be milestone-based and tied to the receipt and validation of the full editable delivery package: 5) Native Source Files: Complete editable KiCad project files (.kicad_pro, .kicad_sch, .kicad_pcb) along with all custom symbol and footprint libraries. 6) Fabrication Data: RS-274X Gerber files and Excellon drill files (.gbr, .drl) packaged in a standard fabrication archive. 7) Assembly Data: 7.1) Normalized BOM (.csv) including Designators, Values, Footprints, and LCSC Part Numbers. 7.2) Centroid / CPL Pick-and-Place file (.pos / .csv) with verified rotations and zero-point alignment. 8) Mechanical & Verification Data: 3D STEP model (.step) of the populated board for mechanical enclosure clearance checking, plus a passing KiCad DRC report. IP, Licensing & Compliance Requirements: 9) Work-for-Hire / IP Assignment: Full intellectual property and commercial design ownership will belong entirely to Honeycomb LLP upon milestone release. An NDA / IP agreement must be signed prior to contract start. 10) Open-Source Compliance: Absolutely no copyleft-licensed sub-circuits or schematics (e.g., GPL, CERN-OHL-S) may be incorporated into the design. Any third-party references must use permissive commercial licenses (MIT, Apache 2.0, BSD, CERN-OHL-P). How to Apply: Please submit: 11) Examples or portfolio links of previous commercial multi-layer boards you have designed in KiCad. 12) Confirmation of your experience with JLCPCB SMT rules, LCSC component selection, and CPL rotation correction. 13) Estimated turnaround time and preferred milestone breakdown. Recommended Freelancer Settings : 14) Skills: PCB Design, KiCad, Electronics, Circuit Design, Schematic Layout, Hardware Design, DFM (Design for Manufacturing). 15) Project Type: Fixed Price (structured across 3 milestones: Schematic Review & BOM Selection - Layout & DRC Pass - Final Production/Gerber/CPL Validation).

Skills required