Design Multi-RF Device with KiCad

About the project

Title: KiCad 4-to-6 Layer PCB Design (Multi-RF: UWB, LoRa, Satellite, NFC, Wireless Charging) Job Type: Fixed Price / Milestone-Based Budget: $1,000 – $2,500 (Design & Manufacturing File Delivery Only) ________________________________________ Project Overview Looking for an expert Hardware & RF Layout Engineer to design a single, ultra-low-power, multi-radio handheld communication device. The entire project must be designed natively in KiCad (v7 or v8). The final deliverables must include complete native KiCad source files and automated SMT production exports. All primary ICs, modules, and antennas have already been finalized and sourced from Mouser. No high-speed DDR memory routing or complex Linux HDI microvias are required for this project. The design uses an all-microcontroller architecture. ________________________________________ Core Components & Subsystems to Integrate Your design will tie the following components into a unified, functional schematic and layout: 1. Host MCU (The Brain): o STM32L4S7VIT6 (Ultra-low-power Arm Cortex-M4 MCU, 120 MHz, 2MB Flash, LQFP-100 package). Will act as the primary SPI/UART/I2C host controller. 2. NFC / Proximity Subsystem: o PN7462AUHN/C300Y (Dedicated NFC Cortex-M0 MCU). Interfaces with the main STM32 via UART/SPI and routes directly to a Molex 146236-0131 flexible NFC antenna with a 13.56 MHz tuning/matching network. 3. Terrestrial Mesh Radio: o Semtech SX1262-based LR62E module (+22.6 dBm Sub-GHz LoRa module). Interfaces via SPI; requires clean layout to its onboard u.FL connector. 4. Local Precision Ranging Engine (UWB): o Qorvo QM35825TR13 SoC (74-BGA package). Must be configured to route to dual AVX/Kyocera 9001978 ultra-small UWB chip antennas. This requires precise differential microwave layout engineering (3.5 GHz to 9 GHz range) following Qorvo's hardware design guidelines. 5. Global Satellite Messaging: o Swarm M138 Transceiver Breakout (SPX-20107). Interfaces via simple logic-level UART. 6. Low-Power Display: o Adafruit 4778 (FeatherWing 2.9" Tri-Color ePaper Display using the SSD1680 driver over SPI). 7. Sensors: o ADXL366BCCZ / ADXL362BCCZ (Nanopower SPI Accelerometers for motion wake-up triggers). o MAX30205MTA+ (I2C human body temperature sensor, requiring careful thermal isolation from heat-generating components). 8. Power & Wireless Charging Infrastructure: o BQ51013BRHLT Qi Wireless Power Receiver IC paired with a Vishay IWAS3827 receiver coil. o BQ24040DSQT 800mA Linear Li-Ion Battery Charger to safely manage a 3.7V 2000mAh Li-Polymer battery. o TPS62170QDSGTQ1 Buck Regulator for high-efficiency system-wide step-down power distribution. ________________________________________ Technical & Layout Constraints • EDA Tool: 100% native KiCad. No converted Altium files accepted. • Layer Count: 4-layer minimum, 6-layer maximum using standard mechanical through-vias (no blind/buried microvias to keep fabrication cheap). • RF Optimization: 50-ohm coplanar waveguide or microstrip trace impedance matching is required for all active antenna paths (UWB, LoRa, Satellite, NFC). • Thermal Isolation: The MAX30205 temperature sensor must be micro-routed on an isolated "island" cut away from the main power management components to prevent internal board heat from skewing environmental readings. • DFM (Design for Manufacturing): The layout must use standard design rules compatible with low-cost rapid assembly plants (e.g., JLCPCB or PCBWay constraints). The BGA footprint for the Qorvo UWB chip must be optimized for standard automated SMT assembly reflow. ________________________________________ Required Freelancer Qualifications • Proven track record designing multi-RF boards, specifically with Gigahertz-range wireless layout (UWB / Microwave). • Experience with ultra-low-power STM32 microcontroller routing, decoupling capacitor placement, and power plane optimization. • Deep proficiency with KiCad schematic capture, footprint creation, and PCB layout editors. • High-quality portfolio examples of previously completed 4+ layer physical PCBs. ________________________________________ Milestones & Deliverables • Milestone 1 (25% Budget): Schematic design capture and complete pin-out mapping verification between host MCU and peripheral ICs. Delivery of initial .kicad_sch file. • Milestone 2 (25% Budget): Preliminary 2D/3D component placement review and stack-up definition inside the KiCad PCB editor. • Milestone 3 (30% Budget): Final 100% completed trace routing, impedance calculations, and 0-error Design Rule Checking (DRC). • Milestone 4 (20% Budget): Final Delivery Package. Full source project files (.kicad_pro, .kicad_sch, .kicad_pcb), Schematic PDFs, fabrication-ready Gerber files (formatted for easy JLCPCB/PCBWay upload), NC Drill files, automated placement Centroid/CPL/Pick-and-Place files, and a manufacturing-ready Bill of Materials (BOM) with verified supplier footprints. ________________________________________

Skills required